The present disclosure relates generally to pulse width modulation (PWM) backlight dimming and, more particularly, to inaudible enhanced PWM backlight dimming.
This section is intended to introduce the reader to various aspects of art that may be related to various aspects of the present techniques, which are described and/or claimed below. This discussion is believed to be helpful in providing the reader with background information to facilitate a better understanding of the various aspects of the present disclosure. Accordingly, it should be understood that these statements are to be read in this light, and not as admissions of prior art.
Electronic displays, such as liquid crystal displays (LCDs), appear in many different electronic devices. The brightness of an LCD depends on the amount of light provided by a backlight assembly. As the backlight assembly emits more light, the brightness of the LCD increases. The backlight assembly may vary the average amount of light emitted by varying a pulse width modulation (PWM) duty cycle of a backlight element, such as a string of light emitting diodes (LEDs). Over time, varying the proportion of the time the backlight is on relative to the time the backlight is off causes the average amount of emitted light to vary accordingly. When the backlight element is switched on and off faster than about 200 Hz, a user will only perceive a change in the intensity of the backlight and is unlikely to see flickering.
Transitioning from one level of backlight assembly brightness to another is ideally carried out in as smooth a manner as possible. The higher the dimming resolution of the backlight—that is, the higher the total number of discrete dimming steps available to the backlight assembly—the smoother the transition from one step to another may be. One manner of increasing the dimming resolution may involve using a faster PWM division signal, which may be used to “chop” a PWM duty cycle into finer segments or pulse widths of a PWM clock cycle. With a faster PWM division signal, a greater number of potential PWM duty cycles may be available at the same PWM clock cycle frequency. A faster PWM division frequency, however, may require new clock circuitry and/or may consume more power. Another manner of increasing the dimming resolution may involve lowering the frequency of the PWM clock cycle while the frequency of the PWM division signal remains the same. With a slower PWM clock cycle, a greater number of potential PWM duty cycles may be available at the same PWM division signal frequency. Achieving meaningful increases in dimming resolution in this way, however, may involve lowering the PWM clock cycle frequency to a frequency less than 20 kHz. At such relatively low frequencies, some longer PWM duty cycles may produce an undesirable “singing capacitor” effect that could be audible to some users.